The invention relates to semiconductor amplifier circuits and, more particularly, to a differential amplifier circuit having a device that compensates for high frequency gain-drop.
Differential amplifiers are widely used in the telecommunications field. Indeed, they allow for the processing of signals that convey voice and, more generally, data. A differential structure is particularly preferred as it generally allows for elimination of harmonics and second-order non-linearities in distortion noise. Furthermore, it ensures greater immunity to common mode interference, such as the interference that power supply circuits of electronic circuits undergo.
This is why differential amplifiers are especially used in all data transfer networks of wire networks (Wide Area Network) as can be found in Asynchronous Transfer Mode (ATM) or Asynchronous Digital Subscriber Line (ADSL) type networks and their principal derivatives HDSL (commonly designated by the generic term XDSL).
With these types of networks, linearity of differential amplifiers has become a decisive factor, especially because the differential amplifiers are designed to operate within a large range of frequencies, for example, from 30 KHz to 10 MHz. Furthermore, in HDSL or VDSL type applications, data carrying signals have large amplitudes, within a voltage range, and consequently, amplifiers must be capable of processing these large signals with satisfactory linearity. For that purpose, it is essential that amplifier structures have a high open-loop gain in the whole considered frequency range, and not only in a narrow band portion. Thus, if a high gain is maintained, up to about 10 MHz for instance, a high feedback rate will be available up to about this extreme value and, consequently, a satisfactory linearity will be reached for the applications considered.
It is thus desirable to provide a low-cost and simple wideband differential amplifier structure which ensures high gain within the extreme values of the frequency band.
The object of the present invention is to provide a wideband differential amplifier structure, provided with a high frequency gain compensation device, which maintains open loop gain up to the highest value of the frequency band.
Another object of the invention is to provide a highly linear differential amplifier device which can be perfectly incorporated into an integrated circuit and uses, particularly, NMOS type components from the bi-CMOS technology.
Another object of the present invention is to provide a differential amplifier structure which is perfectly compatible with telecommunication network requirements and particularly with ADSL or HDSL type links.
The invention reaches these objects by a differential amplifier circuit for operating within a frequency band having first and second input terminals (E1, E2) and first and second output terminals (O1, O2). The circuit may comprise a first stage including first and second transistors of the same polarity and assembled to form a differential amplifier. The first and second transistors may be supplied by first and second mirror current sources, respectively, the current of which is controlled by a control circuit supporting a common mode voltage.
The circuit may further comprise a second Miller gain stage including third and fourth transistors of opposite type from the first and second transistors, and having inputs receiving output signals from the first stage, and supplied by a third and a fourth current source respectively. The third and fourth current sources may be controlled by a bias voltage (Vgs) into which a portion of output signals (O1, O2) are fed-back at high frequency, via a resistive-capacitive circuit, to significantly increase a gain of the second stage towards the upper end of the frequency band.
In a preferred embodiment, the first and second transistors are NMOS type transistors and the third and fourth transistors are PMOS type transistors, which are assembled as a common source. The drains of the PMOS transistors are connected to the first and second outputs O1 and O2, respectively, and have gates connected to receive the corresponding output signals from the first stage.
More particularly, the Miller gain stage current sources are frequency compensated and may comprise a first capacitor having a first terminal connected to the first output terminal (O1) and a second terminal, a second capacitor having a first terminal connected to the second output terminal (O2) and a second terminal, a first resistor having a first terminal connected to the second terminal of the second capacitor and a second resistor having a first terminal connected to the second terminal of the first capacitor. The first and second resistors may have a second common terminal connected to a fifth current source.
The circuit may further comprise a fifth transistor of NMOS type, for example, having a source, a drain and a gate, which are connected to ground, the second output terminal O2 and the first terminal of the second resistor, respectively. The gate of the fifth transistor may be connected to the second terminal of the first capacitor.
The circuit may further comprise a seventh transistor, for example of NMOS type. The seventh transistor may have a source connected to ground, and a drain and a gate connected to the second terminals of first and second resistors, respectively. The passive circuit including the first and second capacitors and the first and second resistors causes output signals to be fed back into gate voltages to maintain the stage""s gain for high-frequency values. In a particular embodiment, the amplifier can be provided with a cascode or follower stage comprising, for instance, bipolar transistors.
The invention is especially adapted for use in wideband amplifiers used in wire telecommunications and, particularly, used in Asynchronous Digital Line Subscriber (ADSL) networks and derivatives thereof.